FSPICE: a tool for fault modelling in MOS circuits
Integration, the VLSI Journal
Fault simulation of linear analog circuits
Journal of Electronic Testing: Theory and Applications - Joint special issue on analog and mixed-signal testing
Computer-Aided Analysis of Electronic Circuits: Algorithms and Computational Techniques
Computer-Aided Analysis of Electronic Circuits: Algorithms and Computational Techniques
Efficient linear circuit analysis by Pade approximation via the Lanczos process
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
CONCERT: a concurrent transient fault simulator for nonlinear analog circuits
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Analog Transient Concurrent Fault Simulation with Dynamic Fault Grouping
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
TBSA: Threshold-Based Simulation Accuracy Method for Fast Analog DC Fault Simulation
Journal of Electronic Testing: Theory and Applications
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In this paper we propose a methodology for obtaining a closed form expression for the output of a linear analog circuits from its state-space description. Voltage waveforms at all the nodes of the circuit are obtained as polynomials in time. This closed form expressions for the circuit response together with the adjoint network method and sparse matrix techniques enhances fast parallel fault simulation. Experiments indicate that significant speedup of fault simulation over serial fault simulation using HSPICE can be obtained using our approach.