Fault Simulation for Analog Circuits Under Parameter Variations
Journal of Electronic Testing: Theory and Applications - special issue on the European test workshop 1999
Efficient DC fault simulation of nonlinear analog circuits
Proceedings of the conference on Design, automation and test in Europe
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Computer Methods for Circuit Analysis and Design
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Journal of Electronic Testing: Theory and Applications
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Starting from a good solution approximation has proved to be very efficient to reduce CPU time required by DC simulation of analog circuits. In order to obtain an additional speedup in DC fault simulation, this paper proposes a new criterion to end the Newton-Raphson (NR) iterative algorithm before convergence. In the case where an initial solution approximation is used, the analysis of the NR algorithm behavior until convergence is presented and a threshold-based simulation accuracy (TBSA) method is then proposed. TBSA stops the iterations when the solution at current NR iteration is enough accurate to immediately classify the fault. According to the detection thresholds, a CPU time/accuracy tradeoff is achieved without altering the fault classification results. The proposed method has been validated on 12 MOS and BJT benchmark circuits considering DC fault simulation under process parameter variations. TBSA is compared to two existing methods which are: standard simulation until convergence method which is accurate but requires a large CPU time, and single NR iteration method which is very fast but without any control over the accuracy. All the compared methods reuse the fault-free circuit results as initial solution for each faulty circuit simulation. It is shown that TBSA requires an intermediate number of NR iterations while achieving correct fault classification, especially for parametric faults which take advantage of using a more accurate initial solution.