ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Industrial Relevance of Analog IFA: A Fact or a Fiction
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Proceedings of the IEEE International Test Conference
Exploit Analog IFA to Improve Specification Based Tests
EDTC '96 Proceedings of the 1996 European conference on Design and Test
ETW '99 Proceedings of the 1999 IEEE European Test Workshop
Digital Signature Proposal for Mixed-Signal Circuits
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Specification-driven test generation for analog circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fault Coverage on RF VCOs and BIST for Wafer Sort Using Peak-to-Peak Voltage Detectors
Journal of Electronic Testing: Theory and Applications
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We present industrial results of a quiescent current testing technique suitable for RF testing. The operational method consists of ramping the power supply and of observing the corresponding quiescent current signatures. When the power supply is swept, all transistors are forced into various regions of operation. This has as advantage that the detection of faults is done for multiple supply voltages and corresponding quiescent currents, enhancing in this form the detectability of faults. We found that this method of structural testing yields fault coverage results comparable to functional RF tests making it a potential and attractive technique for production wafer testing due to its low cost, low testing times and low frequency requirements.