A practical current sensing technique for IDDQ testing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A Design for Testability Scheme for CMOS LC-Tank Voltage Controlled Oscillators
Journal of Electronic Testing: Theory and Applications
A Built-In Loopback Test Methodology for RF Transceiver Circuits Using Embedded Sensor Circuits
ATS '04 Proceedings of the 13th Asian Test Symposium
Multi-VDD Testing for Analog Circuits
Journal of Electronic Testing: Theory and Applications
Evaluation of Signature-Based Testing of RF/Analog Circuits
ETS '05 Proceedings of the 10th IEEE European Symposium on Test
A Low-Cost Jitter Measurement Technique for BIST Applications
Journal of Electronic Testing: Theory and Applications
A BIST Technique for RF Voltage-Controlled Oscillators
ATS '07 Proceedings of the 16th Asian Test Symposium
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A complete study of the fault coverage achievable on two Radio Frequency (RF) Voltage Controlled Oscillators (VCO) is carried out. The peak-to-peak output voltage detection grants the maximal catastrophic and parametric fault coverage. The VCOs and the BIST (Built-In Self-Test) circuitry are designed using the STM CMOS 65 nm process. The frequency of oscillation is 3.6 GHz and the phase noise obtained at 1 MHz offset from the carrier is of 驴121.7 dBc/Hz for VCO1 and of 驴118.8 dBc/Hz for VCO2. The performances of the VCOs are simulated before and after the insertion of the circuitry for the BIST, in order to confirm the transparency of the BIST.