(V)HDL-based verification of heterogeneous synchronous/asynchronous systems
EURO-DAC '94 Proceedings of the conference on European design automation
A VHDL-based design methodology: the design experience of a high performance ASIC chip
EURO-DAC '94 Proceedings of the conference on European design automation
Model checking in industrial hardware design
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
The maximal VHDL subset with a cycle-level abstraction
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
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