Multiplierless multiple constant multiplication
ACM Transactions on Algorithms (TALG)
Time-efficient single constant multiplication based on overlapping digit patterns
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Digital filter synthesis based on an algorithm to generate all minimal signed digit representations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Existing optimal single constant multiplication (SCM) algorithms are limited to 19 bit constants. We propose an exact SCM algorithm. For 32 bit constants, the average run time is under 10 seconds. Optimality is ensured via an exhaustive search. The novelty of our algorithm is in how aggressive pruning is achieved by combining two SCM frameworks.