Multiplication by Integer constants
Software—Practice & Experience
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
Closed-Form Expression for the Average Weight of Signed-Digit Representations
IEEE Transactions on Computers
Variations on the Common Subexpression Problem
Journal of the ACM (JACM)
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Multiple constant multiplication by time-multiplexed mapping of addition chains
Proceedings of the 41st annual Design Automation Conference
Custom-optimized multiplierless implementations of DSP algorithms
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Fast multiplierless approximations of the DCT with the liftingscheme
IEEE Transactions on Signal Processing
Complexity reduction of digital filters using shift inclusive differential coefficients
IEEE Transactions on Signal Processing
A new algorithm for elimination of common subexpressions
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fast discrete Fourier transform computations using the reduced adder graph technique
EURASIP Journal on Applied Signal Processing
An approximate algorithm for the multiple constant multiplications problem
Proceedings of the 21st annual symposium on Integrated circuits and system design
Area optimization algorithms in high-speed digital FIR filter synthesis
Proceedings of the 21st annual symposium on Integrated circuits and system design
On Evolutionary Synthesis of Linear Transforms in FPGA
ICES '08 Proceedings of the 8th international conference on Evolvable Systems: From Biology to Hardware
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Design of low complexity digital FIR filters
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
Optimization of area under a delay constraint in multiple constant multiplications
ICC'09 Proceedings of the 13th WSEAS international conference on Circuits
Time-efficient single constant multiplication based on overlapping digit patterns
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Search algorithms for the multiple constant multiplications problem: Exact and approximate
Microprocessors & Microsystems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A novel optimal single constant multiplication algorithm
Proceedings of the 47th Design Automation Conference
A novel FIR filter implementation using truncated MCM technique
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
Multiple constant multiplication through residue number system
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
Techniques for avoiding sign-extension in multiple constant multiplication
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
Design of multiplierless FIR filters with an adder depth versus filter order trade-off
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
Layout aware optimization of high speed fixed coefficient FIR filters for FPGAs
International Journal of Reconfigurable Computing
Efficient shift-adds design of digit-serial multiple constant multiplications
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
Design of low-power multiple constant multiplications using low-complexity minimum depth operations
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
Trade-offs in multiplier block algorithms for low power digit-serial FIR filters
ICC'06 Proceedings of the 10th WSEAS international conference on Circuits
Fast and energy-efficient constant-coefficient FIR filters using residue number system
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
Optimization Algorithms for the Multiplierless Realization of Linear Transforms
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Finding the optimal tradeoff between area and delay in multiple constant multiplications
Microprocessors & Microsystems
CSD-RNS-based Single Constant Multipliers
Journal of Signal Processing Systems
Integration, the VLSI Journal
An Algorithm for Jointly Optimizing Quantization and Multiple Constant Multiplication
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Multiple tunable constant multiplications: algorithms and applications
Proceedings of the International Conference on Computer-Aided Design
SIREN: a depth-first search algorithm for the filter design optimization problem
Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI
Design of digit-serial FIR filters: algorithms, architectures, and a CAD tool
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Design of low-complexity digital finite impulse response filters on FPGAs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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A variable can be multiplied by a given set of fixed-point constants using a multiplier block that consists exclusively of additions, subtractions, and shifts. The generation of a multiplier block from the set of constants is known as the multiple constant multiplication (MCM) problem. Finding the optimal solution, namely, the one with the fewest number of additions and subtractions, is known to be NP-complete. We propose a new algorithm for the MCM problem, which produces solutions that require up to 20% less additions and subtractions than the best previously known algorithm. At the same time our algorithm, in contrast to the closest competing algorithm, is not limited by the constant bitwidths. We present our algorithm using a unifying formal framework for the best, graph-based MCM algorithms and provide a detailed runtime analysis and experimental evaluation. We show that our algorithm can handle problem sizes as large as 100 32-bit constants in a time acceptable for most applications. The implementation of the new algorithm is available at www.spiral.net.