CSD-RNS-based Single Constant Multipliers

  • Authors:
  • Evangelos Vassalos;Dimitris Bakalis

  • Affiliations:
  • Electronics Laboratory, Physics Department, University of Patras, Patras, Greece;Electronics Laboratory, Physics Department, University of Patras, Patras, Greece

  • Venue:
  • Journal of Signal Processing Systems
  • Year:
  • 2012

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Abstract

Architectures for designing single constant multipliers in Residue Number System (RNS) for moduli of the 2 n 驴1, 2 n and 2 n 驴+驴1 forms are introduced with the constant operand being recoded in Signed-Digit representation. Two methodologies are proposed. In the first one a straightforward implementation of the shift-and-add algorithm is adopted, while in the second one a graph-based approach is used. Both methodologies result in circuits that are shown to be efficient in terms of area and delay.