Residue number system arithmetic: modern applications in digital signal processing
Residue number system arithmetic: modern applications in digital signal processing
Wavelets and subband coding
New Efficient Structure for a Modular Multiplier for RNS
IEEE Transactions on Computers
Journal of VLSI Signal Processing Systems
Implementation of a Communications Channelizer using FPGAs and RNS Arithmetic
Journal of VLSI Signal Processing Systems
Fast Combinatorial RNS Processors for DSP Applications
IEEE Transactions on Computers
Fast implementation of orthogonal wavelet filterbanks using field-programmable logic
ICASSP '99 Proceedings of the Acoustics, Speech, and Signal Processing, 1999. on 1999 IEEE International Conference - Volume 04
Design of RNS-based distributed arithmetic DWT filterbanks
ICASSP '01 Proceedings of the Acoustics, Speech, and Signal Processing, 200. on IEEE International Conference - Volume 02
IEEE Transactions on Signal Processing
Fast Modulo 2^{n} - (2^{n - 2} + 1) Addition: A New Class of Adder for RNS
IEEE Transactions on Computers
IPP@HDL: efficient intellectual property protection scheme for IP cores
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
GLOBECOM'09 Proceedings of the 28th IEEE conference on Global telecommunications
Optimized Implementation of RNS FIR Filters Based on FPGAs
Journal of Signal Processing Systems
CSD-RNS-based Single Constant Multipliers
Journal of Signal Processing Systems
Area-time efficient end-around inverted carry adders
Integration, the VLSI Journal
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The design of high performance, high precision, real-time digital signal processing (DSP) systems, such as those associated with wavelet signal processing, is a challenging problem. This paper reports on the innovative use of the residue number system (RNS) for implementing high-end wavelet filter banks. The disclosed system uses an enhanced index-transformation defined over Galois fields to efficiently support different wavelet filter instantiations without adding any extra cost or additional look-up tables (LUT). A selection of a small wordwidth modulus set are the keys for attaining low-complexity and high-throughput. An exhaustive comparison against existing two's complement (2C) designs for different custom IC technologies was carried out. Results reveal a performance improvement of up to 100% for high-precision RNS-based systems. These structures demonstrated to be well suited for field programmable logic (FPL) assimilation as well as for CBIC (cell-based integrated circuit) technologies.