Residue number system arithmetic: modern applications in digital signal processing
Residue number system arithmetic: modern applications in digital signal processing
Handbook for Digital Signal Processing
Handbook for Digital Signal Processing
Design and Implementation of High-Performance RNS Wavelet Processors Using Custom IC Technologies
Journal of VLSI Signal Processing Systems
Totally Fault Tolerant RNS Based FIR Filters
IOLTS '08 Proceedings of the 2008 14th IEEE International On-Line Testing Symposium
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In this paper optimized Residue Number System (RNS) arithmetic blocks to better exploit some of the architectural characteristics of the last generation FPGAs are presented. The implementation of modulo m adders, modulo m constant and general multipliers, input and output converters are presented. These architectures are based on moduli sets chosen in order to optimally use the 6-input Look-Up Tables (LUTs) available in the Complex Logic Blocks (CLBs) of the new generation FPGAs. Experiments based on the implementation of Finite Impulse Response (FIR) filters characterized by different number of taps and wordlengths shows that the use of RNS together with suitable moduli sets optimally fits the 6-input LUTs in the last generation FPGAs architectures.