Computer Arithmetic Algorithms
Computer Arithmetic Algorithms
Multiplierless multiple constant multiplication
ACM Transactions on Algorithms (TALG)
Multiple constant multiplication through residue number system
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
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An important primitive in the hardware implementations of linear DSP transforms is a circuit that can multiply an input value by one of several different preset constants. We propose a novel implementation of this circuit based on combining the addition chains of the constituent constants. We present an algorithm to automatically generate such a circuit for a given set of constants. The quality of the resulting circuits is evaluated after synthesis for a commercial 0.18um standard cell library. We compare the area and latency efficiency of this addition chain based approach against a straightforward approach based on a constant table and a full multiplier.