DAC '96 Proceedings of the 33rd annual Design Automation Conference
Multiplierless Realization of Linear DSP Transforms by Using Common Two-Term Expressions
Journal of VLSI Signal Processing Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Digital filter synthesis based on minimal signed digit representation
Proceedings of the 38th annual Design Automation Conference
Generic ILP versus specialized 0-1 ILP: an update
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Some Optimizations of Hardware Multiplication by Constant Matrices
IEEE Transactions on Computers
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Multiplierless multiple constant multiplication
ACM Transactions on Algorithms (TALG)
Optimization of area in digital FIR filters using gate-level metrics
Proceedings of the 44th annual Design Automation Conference
Xquasher: a tool for efficient computation of multiple linear expressions
Proceedings of the 46th Annual Design Automation Conference
Time-efficient single constant multiplication based on overlapping digit patterns
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Search algorithms for the multiple constant multiplications problem: Exact and approximate
Microprocessors & Microsystems
Efficient interpolators and filter banks using multiplier blocks
IEEE Transactions on Signal Processing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A graph theoretic approach for synthesizing very low-complexity high-speed digital filters
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An Algorithm for Jointly Optimizing Quantization and Multiple Constant Multiplication
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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This article addresses the problem of finding the fewest numbers of addition and subtraction operations in the multiplication of a constant matrix with an input vector---a fundamental operation in many linear digital signal processing transforms. We first introduce an exact common subexpression elimination (CSE) algorithm that formalizes the minimization of the number of operations as a 0-1 integer linear programming problem. Since there are still instances that the proposed exact algorithm cannot handle due to the NP-completeness of the problem, we also introduce a CSE heuristic algorithm that iteratively finds the most common 2-term subexpressions with the minimum conflicts among the expressions. Furthermore, since the main drawback of CSE algorithms is their dependency on a particular number representation, we propose a hybrid algorithm that initially finds promising realizations of linear transforms using a numerical difference method, and then applies the proposed CSE algorithm to utilize the common subexpressions iteratively. The experimental results on a comprehensive set of instances indicate that the proposed approximate algorithms find competitive results with those of the exact CSE algorithm and obtain better solutions than the prominent, previously proposed, heuristics. It is also observed that our solutions yield significant area reductions in the design of linear transforms after circuit synthesis, compared to direct realizations of linear transforms.