Reducing hardware complexity of linear DSP systems by iteratively eliminating two-term common subexpressions

Authors:
Anup Hosangadi;Farzan Fallah;Ryan Kastner
Affiliations:
University of California, Santa Barbara, Santa Barbara, CA;Fujitsu Laboratories of America, Sunnyvale, CA;University of California, Santa Barbara, Santa Barbara, CA
Venue:
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Year:
2005

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Abstract

This paper presents a novel technique to reduce the number of operations in Multiplierless implementations of linear DSP transforms, by iteratively eliminating two-term common subexpressions. Our method uses a polynomial transformation of linear systems that enables us to eliminate common subexpressions consisting of multiple variables. Our algorithm is fast and produces the least number of additions/subtractions compared to all known techniques. The synthesized examples show significant reductions in the area and power consumption.