Synthesis of multiplier-less FIR filters with minimum number of additions

  • Authors:
  • Mahesh Mehendale;S. D. Sherlekar;G. Venkatesh

  • Affiliations:
  • Texas Instruments (India) Ltd, 71, Miller Road, Bangalore 560052, India;Dept. of Computer Sc. and Engg., Indian Institute of Technology, Powai, Bombay, 400069, India;Dept. of Computer Sc. and Engg., Indian Institute of Technology, Powai, Bombay, 400069, India

  • Venue:
  • ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
  • Year:
  • 1995

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Abstract

Abstract: In this paper we present optimizing transformations to minimize the number of additions+subtractions in both the direct form (/spl Sigma/ A/sub i/X/sub n-i/ based) and its transposed form (Multiple Constant Multiplication based) implementation of FIR filters. These transformations are based on the iterative elimination of 2-bit common subexpressions in the coefficients binary representations. We give detailed description of the algorithms and present results for eight low pass FIR filters with the number of coefficients ranging from 16 to 128. The results show upto 35% reduction in the number of additions+subtractions to implement /spl Sigma/ A/sub i/X/sub n-i/ based FIR filter structures and upto 38% reduction to implement MCM based structures.