Efficient substitution of multiple constant multiplications by shifts and additions using iterative pairwise matching

Synthesis of multiplier-less FIR filters with minimum number of additions

ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design

Optimized code generation of multiplication-free linear transforms

DAC '96 Proceedings of the 33rd annual Design Automation Conference

Power optimization in programmable processors and ASIC implementations of linear systems: transformation-based approach

DAC '96 Proceedings of the 33rd annual Design Automation Conference

Low-Area/Power Parallel FIR Digital Filter Implementations

Journal of VLSI Signal Processing Systems

A methodology for guided behavioral-level optimization

DAC '98 Proceedings of the 35th annual Design Automation Conference

System-Level Data-Flow Transformation Exploration andPower-Area Trade-offs Demonstrated on Video Codecs

Journal of VLSI Signal Processing Systems - Special issue on systematic trade-off analysis in signal processing systems design

Digital filter synthesis based on minimal signed digit representation

Proceedings of the 38th annual Design Automation Conference

FIR filter synthesis algorithms for minimizing the delay and the number of adders

Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design

OPTIMUS: a new program for OPTIMizing linear circuits with number-splitting and shift-and-add decompositions

ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)

A Specification Invariant Technique for Regularity Improvement between Flow-Graph Clusters

EDTC '96 Proceedings of the 1996 European conference on Design and Test

Area-Delay Tradeoff in Distributed Arithmetic Based Implementation of FIR Filters

VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications

An improved synthesis method for low power hardwired FIR filters

SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design

Exploiting general coefficient representation for the optimal sharing of partial products in MCMs

SBCCI '06 Proceedings of the 19th annual symposium on Integrated circuits and systems design

Low Power Realization and Synthesis of Higher-Order FIR Filters Using an Improved Common Subexpression Elimination Method

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Design of low power multimode time-shared filters

ICICS'09 Proceedings of the 7th international conference on Information, communications and signal processing

Finding the optimal tradeoff between area and delay in multiple constant multiplications

Microprocessors & Microsystems

An Algorithm for Jointly Optimizing Quantization and Multiple Constant Multiplication

ACM Transactions on Design Automation of Electronic Systems (TODAES)