A scheduling and resource allocation algorithm for hierarchical signal flow graphs
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Module selection for pipelined synthesis
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Guest Editorial: High-Level Synthesis of Digital Circuits
IEEE Design & Test
Time constrained allocation and assignment techniques for high throughput signal processing
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
DAC '93 Proceedings of the 30th international Design Automation Conference
Critical path minimization using retiming and algebraic speed-up
DAC '93 Proceedings of the 30th international Design Automation Conference
Algorithm selection: a quantitative computation-intensive optimization approach
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Module selection and data format conversion for cost-optimal DSP synthesis
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Design of heterogeneous ICs for mobile and personal communication systems
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Non-scan design-for-testability of RT-level data paths
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
DAC '94 Proceedings of the 31st annual Design Automation Conference
Manifestations of heterogeneity in hardware/software co-design
DAC '94 Proceedings of the 31st annual Design Automation Conference
OPERAS in a DSP CAD environment
EURO-DAC '94 Proceedings of the conference on European design automation
Synthesis of signal processing structured datapaths for FPGAs supporting RAMs and busses
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
Rephasing: a transformation technique for the manipulation of timing constraints
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Design-for-debugging of application specific designs
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Phantom redundancy: a high-level synthesis approach for manufacturability
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Introspection: a low overhead binding technique during self-diagnosing microarchitecture synthesis
DAC '96 Proceedings of the 33rd annual Design Automation Conference
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Scheduling techniques to enable power management
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Exploiting regularity for low-power design
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
A design for testability technique for RTL circuits using control/data flow extraction
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Heterogeneous built-in resiliency of application specific programmable processors
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Determining the Order of Processor Transactions in StaticallyScheduled Multiprocessors
Journal of VLSI Signal Processing Systems
Exploiting hardware sharing in high-level synthesis for partial scan optimization
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
High level synthesis for reconfigurable datapath structures
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Low power high level synthesis by increasing data correlation
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Methodology for behavioral synthesis-based algorithm-level design space exploration: DCT case study
DAC '97 Proceedings of the 34th annual Design Automation Conference
Education for the deep submicron age: business as usual?
DAC '97 Proceedings of the 34th annual Design Automation Conference
Potential-driven statistical ordering of transformations
DAC '97 Proceedings of the 34th annual Design Automation Conference
Synthesis of application specific programmable processors
DAC '97 Proceedings of the 34th annual Design Automation Conference
Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Power optimization using divide-and-conquer techniques for minimization of the number of operations
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
A quantitative approach to functional debugging
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
A methodology for guided behavioral-level optimization
DAC '98 Proceedings of the 35th annual Design Automation Conference
Functional debugging of systems-on-chip
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Heuristic Loop-Based Scheduling and Allocation for DSP Synthesis with Heterogeneous Functional Units
Journal of VLSI Signal Processing Systems
HYPER-LP: a system for power minimization using architectural transformations
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Performance-driven scheduling with bit-level chaining
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Engineering change: methodology and applications to behavioral and system synthesis
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Power optimization using divide-and-conquer techniques for minimization of the number of operations
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A methodology and algorithms for the design of hard real-time multitasking ASICs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Watermarking while preserving the critical path
Proceedings of the 37th Annual Design Automation Conference
Throughput optimization of general non-linear computations
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Localized watermarking: methodology and application to operation scheduling
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Power minimization of functional units partially guarded computation
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Narrow bus encoding for low power systems
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
High-level synthesis under multi-cycle interconnect delay
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Computer Aided Design of Fault-Tolerant Application Specific Programmable Processors
IEEE Transactions on Computers
Proceedings of the 38th annual Design Automation Conference
MetaCores: design and optimization techniques
Proceedings of the 38th annual Design Automation Conference
Low power pipelining of linear systems: a common operand centric approach
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Narrow bus encoding for low-power DSP systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Watermarking integer linear programming solutions
Proceedings of the 39th annual Design Automation Conference
Behavioral synthesis via engineering change
Proceedings of the 39th annual Design Automation Conference
Forward-looking objective functions: concept & applications in high level synthesis
Proceedings of the 39th annual Design Automation Conference
Readings in hardware/software co-design
Readings in hardware/software co-design
CoWare---a design environment for heterogeneous hardware/software systems
Readings in hardware/software co-design
A hardware-software codesign methodology for DSP applications
Readings in hardware/software co-design
Symbolic debugging scheme for optimized hardware and software
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Using VHDL for High-Level, Mixed-Mode System Simulation
IEEE Design & Test
A Hardware-Software Codesign Methodology for DSP Applications
IEEE Design & Test
An Integrated CAD Environment for Low-Power Design
IEEE Design & Test
Intellectual Property Metering
IHW '01 Proceedings of the 4th International Workshop on Information Hiding
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Application-domain-driven system design for pervasive video processing
Ambient intelligence
Behavioral synthesis techniques for intellectual property protection
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Platform-based resource binding using a distributed register-file microarchitecture
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Flexible Controller Design and Its Application for Concurrent Execution of Buffer Centric Dataflows
Journal of VLSI Signal Processing Systems
Low Power VLSI Design Techniques - The Current State
Integrated Computer-Aided Engineering
Simplifying physical realization of Gaussian particle filters with block-level pipeline control
EURASIP Journal on Applied Signal Processing
Resource sharing among mutually exclusive sum-of-product blocks for area reduction
ACM Transactions on Design Automation of Electronic Systems (TODAES)
ACM Transactions on Design Automation of Electronic Systems (TODAES)
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Transforming behavioral specifications to facilitate synthesis of testable designs
ITC'94 Proceedings of the 1994 international conference on Test
A cyclic scheduling problem with an undetermined number of parallel identical processors
Computational Optimization and Applications
Pipelining with common operands for power-efficient linear systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Behavioral-level synthesis of heterogeneous BISR reconfigurable ASIC's
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exploration with upgradeable models using statistical methods for physical model emulation
Proceedings of the 50th Annual Design Automation Conference
Pipelined parallel FFT architectures via folding transformation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 0.00 |
A description is given of Hyper, a synthesis environment for real-time systems with datapath-intensive architectures. Hyper uses a single, global quality measure throughout the system to drive the exploration of the design space. This approach effectively merges the allocation of hardware, the application of transformations, and the handling of hierarchy in a consistent way. Hyper's modular organization around a central database also allows new software modules to be introduced easily. The discussion covers behavioral specification, module selection, exploring the design space, transformations, scheduling and assignment, and hardware mapping. Four versions of an IIR filter generated using Hyper and Lager IV are compared. It is seen that layouts generated using Hyper are more area efficient than layouts done using the more traditional methods based on one-to-one mapping or the use of multiprocessors.