High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
Architectural power analysis: the dual bit type method
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Scheduling and resource binding for low power
ISSS '95 Proceedings of the 8th international symposium on System synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Low-power architectural synthesis and the impact of exploiting locality
Journal of VLSI Signal Processing Systems - Special issue on technologies for wireless computing
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Fast Prototyping of Datapath-Intensive Architectures
IEEE Design & Test
Behavioral Synthesis for low Power
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
Microarchitectural Synthesis of Performance-Constrained, Low-Power VLSI Designs
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
Optimizing power using transformations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Power minimization derived from architectural-usage of VLIW processors
Proceedings of the 37th Annual Design Automation Conference
Power minimization of functional units partially guarded computation
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
EUC'07 Proceedings of the 2007 conference on Emerging direction in embedded and ubiquitous computing
Using speculative functional units in high level synthesis
Proceedings of the Conference on Design, Automation and Test in Europe
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