Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Reliable computer systems (2nd ed.): design and evaluation
Reliable computer systems (2nd ed.): design and evaluation
High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
Phantom redundancy: a high-level synthesis approach for manufacturability
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Fast Prototyping of Datapath-Intensive Architectures
IEEE Design & Test
Automatic Synthesis of Self-Recovering VLSI Systems
IEEE Transactions on Computers
High Level Synthesis Techniques for Efficient Built-In-Self Repair
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
Optimal Recovery Point Insertion for High-Level Synthesis of Recoverable Microarchitectures
FTCS '95 Proceedings of the Twenty-Fifth International Symposium on Fault-Tolerant Computing
Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Media architecture: general purpose vs. multiple application-specific programmable processor
DAC '98 Proceedings of the 35th annual Design Automation Conference
Computer Aided Design of Fault-Tolerant Application Specific Programmable Processors
IEEE Transactions on Computers
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Using the flexibility provided by multiple functionalities we have developed a new approach for permanent fault-tolerance: Heterogeneous Built-In-Resiliency (HBIR). HBIR processor synthesis imposes several unique tasks on the synthesis process: (i) latency determination targeting k-unit fault-tolerance, (ii) application-to-faulty-unit matching and (iii) HBIR scheduling and assignment algorithms. We address each of them and demonstrate the effectiveness of the overall approach, the synthesis algorithms, and software implementations on a number of designs.