Phantom redundancy: a high-level synthesis approach for manufacturability

Authors:
Balakrishnan Iyer;Ramesh Karri;Israel Koren
Affiliations:
Department of Electrical and Computer Engineering, University of Massachusetts at Amherst, Amherst, MA;Department of Electrical and Computer Engineering, University of Massachusetts at Amherst, Amherst, MA;Department of Electrical and Computer Engineering, University of Massachusetts at Amherst, Amherst, MA
Venue:
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Year:
1995

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Abstract

Abstract: Phantom redundancy, an area-efficient technique for fabrication-time reconfigurability is presented. Phantom redundancy adds extra interconnect so as to render the resulting microarchitecture reconfigurable in the presence of any (single) functional unit failure. The proposed technique yields partially good chips in addition to perfect chips. A genetic algorithm is used to incorporate phantom redundancy constraints into microarchitecture synthesis. The algorithm minimizes tire performance degradation due to any faulty functional unit of the resulting microarchitecture. The effectiveness of the technique is illustrated on benchmark examples.