Using VHDL for High-Level, Mixed-Mode System Simulation

  • Authors:
  • Mani B. Srivastava;Robert W. Brodersen

  • Affiliations:
  • -;-

  • Venue:
  • IEEE Design & Test
  • Year:
  • 1992

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Abstract

The application of a very-high-speed integrated circuit hardware description language (VHDL) to the modeling of complex, application-specific systems that employ a mix of digital hardware and software and interact with their environments through continuous-time components is described. A VHDL model simulating package and a SPICE-like low-level package simulating continuous-time subsystems are discussed. To illustrate how the various packages discussed are used in a complete high-level system simulation, a simplified high-level block diagram of a robot control system is presented, and the modeling of the system is described. Specialized VHDL packages model the system's discrete-time portion as a set of concurrent processes communicating via channels with well-defined protocols, and sets of coupled ordinary differential equations model the system's continuous-time blocks.