New methods for coloring and clique partitioning in data path allocation
Integration, the VLSI Journal
Greed is good: approximating independent sets in sparse and bounded-degree graphs
STOC '94 Proceedings of the twenty-sixth annual ACM symposium on Theory of computing
Architectural power analysis: the dual bit type method
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Low-power architectural synthesis and the impact of exploiting locality
Journal of VLSI Signal Processing Systems - Special issue on technologies for wireless computing
Instruction set mapping for performance optimization
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Fast Prototyping of Datapath-Intensive Architectures
IEEE Design & Test
Recent developments in high-level synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
High-level power modeling, estimation, and optimization
DAC '97 Proceedings of the 34th annual Design Automation Conference
The impact of data characteristics and hardware topology on hardware selection for low power DSP
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Identification and exploitation of symmetries in DSP algorithms
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Power optimization using divide-and-conquer techniques for minimization of the number of operations
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Subsetting Behavioral Intellectual Property for Low Power ASIP Design
Journal of VLSI Signal Processing Systems - Special issue on system level design
Synthesis of low power folded programmable coefficient FIR digital filters (short paper)
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Models for power consumption and power grid noise due to datapath transition activity
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
Instruction generation and regularity extraction for reconfigurable processors
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Instruction generation for hybrid reconfigurable systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Mapping of DSP Algorithms on Field Programmable Function Arrays
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Low-power VLSI synthesis of DSP systems
Integration, the VLSI Journal
Models for Architectural Power and Power Grid Noise Analysis on Data Bus
Journal of VLSI Signal Processing Systems
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