Software pipelining: an effective scheduling technique for VLIW machines
PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
Scanning polyhedra with DO loops
PPOPP '91 Proceedings of the third ACM SIGPLAN symposium on Principles and practice of parallel programming
The ALPHA language and its use for the design of systolic arrays
Journal of VLSI Signal Processing Systems - Special issue: algorithms and parallel VSLI architecture
Some efficient solutions to the affine scheduling problem: I. One-dimensional time
International Journal of Parallel Programming
Decomposed software pipelining: a new perspective and a new approach
International Journal of Parallel Programming
Resource constrained scheduling of uniform algorithms
Journal of VLSI Signal Processing Systems
Compaan: deriving process networks from Matlab for embedded signal processing architectures
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Generation of Efficient Nested Loops from Polyhedra
International Journal of Parallel Programming - Special issue on instruction-level parallelism and parallelizing compilation, part 2
Fast Prototyping of Datapath-Intensive Architectures
IEEE Design & Test
Multi-periodic Process Networks: Prototyping and Verifying Stream-Processing Systems
Euro-Par '02 Proceedings of the 8th International Euro-Par Conference on Parallel Processing
On the Optimality of Feautrier's Scheduling Algorithm
Euro-Par '02 Proceedings of the 8th International Euro-Par Conference on Parallel Processing
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
Synchronization of periodic clocks
Proceedings of the 5th ACM international conference on Embedded software
N-synchronous Kahn networks: a relaxed model of synchrony for real-time systems
Conference record of the 33rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
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Pervasive video processing in future Ambient Intelligence environments sets new challenges in embedded system design. In particular, very high performance requirements have to be combined with the constraints of deeply embedded systems, frequently changing operating modes, and low-cost, high-volume production. By leveraging upon the key properties of the application domain, we devised a computation model, a hardware template, and a programming approach which provide a natural mapping from application requirements to a complete system solution. Our approach enables the direct exploitation of concurrency and regularity in achieving the combined challenge of adaptability, performance, and efficiency.