Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Advanced compiler optimizations for supercomputers
Communications of the ACM - Special issue on parallelism
Compiler Optimizations for Enhancing Parallelism and Their Impact on Architecture Design
IEEE Transactions on Computers - Special issue on architectural support for programming languages and operating systems
An approach to ordering optimizing transformations
PPOPP '90 Proceedings of the second ACM SIGPLAN symposium on Principles & practice of parallel programming
Time constrained allocation and assignment techniques for high throughput signal processing
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Incremental tree height reduction for high level synthesis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Area optimization of multi-functional processing units
ICCAD '92 1992 IEEE/ACM international conference proceedings on Computer-aided design
False loops through resource sharing
ICCAD '92 1992 IEEE/ACM international conference proceedings on Computer-aided design
DAC '94 Proceedings of the 31st annual Design Automation Conference
Instruction set definition and instruction selection for ASIPs
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
A specification invariant technique for operation cost minimisation in flow-graphs
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
A new synthesis for the MIMOLA software system
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Program Improvement by Source-to-Source Transformation
Journal of the ACM (JACM)
Proceedings of the IFIP WG10.2/WG10.5 Workshops on Synthesis for Control Dominated Circuits
Journal of VLSI Signal Processing Systems - Special issue on systematic trade-off analysis in signal processing systems design
An Optimal Allocation of Carry-Save-Adders in Arithmetic Circuits
IEEE Transactions on Computers
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Layout-aware synthesis of arithmetic circuits
Proceedings of the 39th annual Design Automation Conference
Area-efficient instruction set synthesis for reconfigurable system-on-chip designs
Proceedings of the 41st annual Design Automation Conference
Tight integration of timing-driven synthesis and placement of parallel multiplier circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The Instruction-Set Extension Problem: A Survey
ARC '08 Proceedings of the 4th international workshop on Reconfigurable Computing: Architectures, Tools and Applications
The Instruction-Set Extension Problem: A Survey
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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In system-level synthesis for DSP applications, algorithmic transformations on the initially specified flow-graph are crucial to arrive at a good specification as input for either high-level hardware synthesis, or for code generation. For both target styles, sharing of clusters (partitions) of the flow-graph on the same resource is essential to optimize within the combined search space of area, time, and power. To decrease sharing overhead, it is important for clusters that share the same resource to match each other as good as possible, which is the aim of regularity improvement. In this paper, we present a new technique that improves the regularity between two or more flow-graph clusters by means of algebraic transformations, operating at the word-level. The technique consists of a steepest descent optimization step, preceded by a normalization step. Both steps use optimizing algebraic transformations that feature a limited look-ahead. Regularity improvement is modeled as an area minimization problem. The technique is invariant to structural changes in the specification of the clusters, as long as their functionality is not affected. Our main target domain consists of lowly-multiplexed realizations of real-time DSP applications. The power of our approach is substantiated on several real-life applications from the video and image processing domain. The regularity improvement technique is able to generate optimal (or close to optimal) results, independent of cluster duplications or (behavior-preserving) cluster structure modifications, with only a few composite transformations. Large savings are possible compared to non optimized flow-graph clusters with an acceptable but relatively large run time complexity.