Automatic generation of digital system schematic diagrams
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Automatic generation of self-test programs—a new feature of the MIMOLA design system
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
The Generation of Optimal Code for Arithmetic Expressions
Journal of the ACM (JACM)
Efficient Computation of Expressions with Common Subexpressions
Journal of the ACM (JACM)
Some Aspects of High-Level Microprogramming
ACM Computing Surveys (CSUR)
The VLSI Design Automation Assistant: Prototype system
DAC '83 Proceedings of the 20th Design Automation Conference
Facet: A procedure for the automated synthesis of digital systems
DAC '83 Proceedings of the 20th Design Automation Conference
A general methodology for synthesis and verification of register-transfer designs
DAC '84 Proceedings of the 21st Design Automation Conference
The mimola design system: Tools for the design of digital processors
DAC '84 Proceedings of the 21st Design Automation Conference
A retargetable compiler for a high-level microprogramming language
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
Methods of compacting microprograms
Methods of compacting microprograms
Computer-aided logic synthesis based on a new multi-level hardware design language---lalsd ii
Computer-aided logic synthesis based on a new multi-level hardware design language---lalsd ii
SAMP: a general purpose processor based on a self-timed VLIW structure
ACM SIGARCH Computer Architecture News
Force-directed scheduling in automatic data path synthesis
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Verification of hardware descriptions by retargetable code generation
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Move frame scheduling and mixed scheduling-allocation for the automated synthesis of digital systems
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Constraint sensitive scheduling in RASP
ACM SIGDA Newsletter
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Data path allocation based on bipartite weighted matching
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
A data path synthesis method for self-testable designs
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Fast and near optimal scheduling in automatic data path synthesis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A neural network based algorithm for the scheduling problem in high-level synthesis
EURO-DAC '92 Proceedings of the conference on European design automation
Register assignment through resource classification for ASIP microcode generation
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
OSCAR: optimum simultaneous scheduling, allocation and resource binding based on integer programming
EURO-DAC '94 Proceedings of the conference on European design automation
Architectural partitioning of control memory for application specific programmable processors
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
An ASIP instruction set optimization algorithm with functional module sharing constraint
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Three-phase chip planning — an improved top-down chip planning strategy
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Net Scheduling in High-Level Synthesis
IEEE Design & Test
A Specification Invariant Technique for Regularity Improvement between Flow-Graph Clusters
EDTC '96 Proceedings of the 1996 European conference on Design and Test
A neural net based self organising scheduling algorithm
EURO-DAC '90 Proceedings of the conference on European design automation
Matching system and component behaviour in MIMOLA synthesis tools
EURO-DAC '90 Proceedings of the conference on European design automation
A design representation for high level synthesis
EURO-DAC '90 Proceedings of the conference on European design automation
Processor Description Languages
Processor Description Languages
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The MIMOLA software system is a system for the design of digital processors. The system includes subsystems for retargetable microcode generation, automatic generation of self-test programs and a synthesis subsystem. This paper describes the synthesis part of the system, which accepts a PASCAL-like, high-level program as specification and produces a register transfer structure. Because of the complexity of this design process, a set of sub-problems is identified and algorithms for their solution are indicated. These algorithms include a flexible statement decomposition, statement scheduling, register assignment, module selection and optimizations of interconnections and instruction word length.