Knowledge based control in micro-architecture design
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
HAL: a multi-paradigm approach to automatic data path synthesis
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
A new synthesis for the MIMOLA software system
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
MAHA: a program for datapath synthesis
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
VLSI Signal Processing; A Bit-Serial Approach
VLSI Signal Processing; A Bit-Serial Approach
Programmable DSPs: A Brief Overview
IEEE Micro
Address Generation for array access based on modulus m counters
EURO-DAC '91 Proceedings of the conference on European design automation
Improved force-directed scheduling
EURO-DAC '91 Proceedings of the conference on European design automation
PHIDEO: a silicon compiler for high speed algorithms
EURO-DAC '91 Proceedings of the conference on European design automation
A register file and scheduling model for application specific processor synthesis
DAC '96 Proceedings of the 33rd annual Design Automation Conference
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An overview of design alternatives for the translation of signal processing systems into silicon addresses for digital signal processing in consumer applications is presented. Since the most appropriate approach varies with the life-cycle phase of the application, the alternatives range from general-purpose to application-specific approaches. The architectures of the Piramid compiler, which supports digital audio, low-end digital video, telecommunications, speech processing, and control applications, and the Phideo compiler, which supports digital video applications such as HDTV in which sampling rates typically approach the maximum feasible clock rates in state-of-the-art CMOS fabrication processes, are discussed.