An overview of the Penn State design system
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
The reconfigurable arithmetic processor
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Importance Sampling for Ising Computers Using One-Dimensional Cellular Automata
IEEE Transactions on Computers
IEEE Transactions on Computers
ALPS: an algorithm for pipeline data path synthesis
MICRO 24 Proceedings of the 24th annual international symposium on Microarchitecture
DAC '93 Proceedings of the 30th international Design Automation Conference
Concurrent Error Detection in Nonlinear Digital Circuits Using Time-Freeze Linearization
IEEE Transactions on Computers
A digit-serial silicon compiler
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Low-Energy Digit-Serial/Parallel Finite Field Multipliers
Journal of VLSI Signal Processing Systems - Special issue on application specific systems, architectures and processors
Analog versus digital: extrapolating from electronics to neurobiology
Neural Computation
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Application of FPGA technology to accelerate the finite-difference time-domain (FDTD) method
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
A Synthesis Environment for Designing DSP Systems
IEEE Design & Test
Designing a Custom DSP Circuit Using VHDL
IEEE Micro
The Design of Fault-Tolerant Linear Digital State Variable Systems: Theory and Techniques
IEEE Transactions on Computers
A VLSI Constant Geometry Architecture for the Fast Hartley and Fourier Transforms
IEEE Transactions on Parallel and Distributed Systems
Gated logic with optical solitons
Collision-based computing
Theoretical Limits on the Data Dependent Performance of Asynchronous Circuits
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
A new approach to pipeline optimisation
EURO-DAC '90 Proceedings of the conference on European design automation
Optimization techniques for a reconfigurable, self-timed, and bit-serial architecture
Proceedings of the 20th annual conference on Integrated circuits and systems design
Implementation of the AES Algorithm for a Reconfigurable, Bit Serial, Fully Pipelined Architecture
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
Checksum-based probabilistic transient-error compensation for linear digital systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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