A behavioral compiler for intelligent silicon compilation
A behavioral compiler for intelligent silicon compilation
A design utility manager: the ADAM planning engine
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
An expert-system paradigm for design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
HAL: a multi-paradigm approach to automatic data path synthesis
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Principles of the SYCO compiler
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Scheduling and binding algorithms for high-level synthesis
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
VHDL synthesis using structured modeling
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Relative scheduling under timing constraints
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
False path exclusion in delay analysis of RTL-based datapath-controller designs
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Layout-driven module selection for register-transfer synthesis of sub-micron ASIC's
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Tutorial on high-level synthesis
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
HERCULES—a system for high-level synthesis
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
False path exclusion in delay analysis of RTL structures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
EURO-DAC '90 Proceedings of the conference on European design automation
Datapath optimization using feedback
EURO-DAC '91 Proceedings of the conference on European design automation
Optimal synthesis of control logic from behavioral specifications
Integration, the VLSI Journal
Instructions activating conditions for hardware-based auto-scheduling
Proceedings of the 9th conference on Computing Frontiers
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This paper describes the principles and implementation of design-process control in a micro-architecture compiler. The knowledge-base relies on both local and global evaluations to determine strategies to achieve global goals and then implements those strategies by manipulating hardware allocations and search heuristics. A system overview and annotated sample run are presented.