Knowledge based control in micro-architecture design
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
HERCULES—a system for high-level synthesis
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Synthesis techniques for digital systems design
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
HAL: a multi-paradigm approach to automatic data path synthesis
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Synthesis of concurrent modular controllers from algorithmic descriptions
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
MAHA: a program for datapath synthesis
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Local Microcode Compaction Techniques
ACM Computing Surveys (CSUR)
Automatic synthesis of microcontrollers
MICRO 11 Proceedings of the 11th annual workshop on Microprogramming
Behavioral transformation for algorithmic level IC design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Synthesizing circuits from behavioural descriptions
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper presents a method of synthesizing control for synchronous digital circuits starting from a behavioral description of the hardware. The input to the control synthesis task is an abstraction of hardware behavior based on sequencing graphs. The model is a concise way of specifying both control and data dependencies, and support hierarchy, unbounded delay operations such as data-dependent loops and external synchronizations, and multiple threads of concurrent execution flow. We show how the sequencing graph can be mapped directly to a modular interconnection of finite state machines. The approach, called adaptive control, is different from other control schemes in that it takes into account the dynamic variations in the execution delay of operations due to the changing inputs. It is optimal by guaranteeing the minimum number of cycles in the execution of a hardware behavior for all input sequences., Specifically, there are no performance penalties for the arbitrary nesting of procedure calls, conditionals, or loops. The adaptive control model and implementation are used within the framework of the HERCULES/HEBE High-Level Synthesis system.