Design of digit-serial FIR filters: algorithms, architectures, and a CAD tool

Authors:
Levent Aksoy;Cristiano Lazzari;Eduardo Costa;Paulo Flores;José Monteiro
Affiliations:
INESC-ID, Lisbon, Portugal;INESC-ID, Lisbon, Portugal;Universidade Católica de Pelotas, Pelotas, Brazil;INESC-ID, IST TU Lisbon, Lisbon, Portugal;INESC-ID, IST TU Lisbon, Lisbon, Portugal
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2013

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Abstract

In the last two decades, many efficient algorithms and architectures have been introduced for the design of low-complexity bit-parallel multiple constant multiplications (MCM) operation which dominates the complexity of many digital signal processing systems. On the other hand, little attention has been given to the digit-serial MCM design that offers alternative low-complexity MCM operations albeit at the cost of an increased delay. In this paper, we address the problem of optimizing the gate-level area in digit-serial MCM designs and introduce high-level synthesis algorithms, design architectures, and a computer-aided design tool. Experimental results show the efficiency of the proposed optimization algorithms and of the digit-serial MCM architectures in the design of digit-serial MCM operations and finite impulse response filters.