An exact algorithm for the maximal sharing of partial terms in multiple constant multiplications
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Digital filter synthesis based on an algorithm to generate all minimal signed digit representations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Finding the optimal tradeoff between area and delay in multiple constant multiplications
Microprocessors & Microsystems
Integration, the VLSI Journal
Design of digit-serial FIR filters: algorithms, architectures, and a CAD tool
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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In the context of multiple constant multiplication (MCM) design, we propose a novel common subexpression elimination (CSE) algorithm that models the optimal synthesis of coefficients into a 0--1 mixed-integer linear programming (MILP) problem. A time delay constraint is included for synthesis. We also propose coefficient decompositions that combine all minimal signed digit (MSD) representations and the shifted sum (difference) of coefficients. In the examples we demonstrate, the proposed solution space further reduces the number of adders/subtractors in the MCM synthesis.