Stochastic finite elements: a spectral approach
Stochastic finite elements: a spectral approach
FastPep: a fast parasitic extraction program for complex three-dimensional geometries
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
High-Order Collocation Methods for Differential Equations with Random Inputs
SIAM Journal on Scientific Computing
FastSies: a fast stochastic integral equation solver for modeling the rough surface effect
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Proceedings of the conference on Design, automation and test in Europe
Stochastic integral equation solver for efficient variation-aware interconnect extraction
Proceedings of the 45th annual Design Automation Conference
Variation-aware interconnect extraction using statistical moment preserving model order reduction
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Uncertainty quantification for integrated circuits: stochastic spectral methods
Proceedings of the International Conference on Computer-Aided Design
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In this paper we present an efficient algorithm for variation-aware interconnect extraction. The problem we are addressing can be formulated mathematically as the solution of linear systems with matrix coefficients that are dependent on a set of random variables. Our algorithm is based on representing the solution vector as a summation of terms. Each term is a product of an unknown vector in the deterministic space and an unknown direction in the stochastic space. We then formulate a simple nonlinear optimization problem which uncovers sequentially the most relevant directions in the combined deterministic-stochastic space. The complexity of our algorithm scales with the sum (rather than the product) of the sizes of the deterministic and stochastic spaces, hence it is orders of magnitude more efficient than many of the available state of the art techniques. Finally, we validate our algorithm on a variety of onchip and off-chip capacitance and inductance extraction problems, ranging from moderate to very large size, not feasible using any of the available state of the art techniques.