A three-step power-gating turn-on technique for controlling ground bounce noise

Authors:
Rahul Singh;AhReum Kim;SoYoung Kim;Suhwan Kim
Affiliations:
Seoul National University, Seoul, South Korea;Seoul National University, Seoul, South Korea;Sungkyunkwan University, Suwon, South Korea;Seoul National University, Seoul, South Korea
Venue:
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Year:
2010

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Abstract

To suppress the ground bounce noise with a minimal wake-up time penalty, a three-step turn-on strategy and its corresponding power-gating structure are proposed. During the circuit's meta-stable region of operation, specifically, the amount of current flowing through the sleep transistors is precisely controlled while the virtual or circuit power supply is quickly boosted when the internal nodes of the circuit are stable. In 65 nm CMOS technology, simulation results demonstrate that our technique reduces the peak amplitude of the ground bouncing noise by up to 94% as compared to the conventional abrupt turn-on technique.