VLSI design of 1-D DWT architecture with parallel filters
Integration, the VLSI Journal
Epileptic Seizures Detection Using Continuous Time Wavelet Based Artificial Neural Networks
ITNG '09 Proceedings of the 2009 Sixth International Conference on Information Technology: New Generations
Variation-aware low-power synthesis methodology for fixed-point FIR filters
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Low-Power Architecture for Epileptic Seizure Detection Based on Reduced Complexity DWT
ACM Journal on Emerging Technologies in Computing Systems (JETC) - Special Issue on Implantable Electronics
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
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In this paper, we have developed a low-complexity algorithm for epileptic seizure detection with a high degree of accuracy. The algorithm has been designed to be feasibly implementable as battery-powered low-power implantable epileptic seizure detection system or epilepsy prosthesis. This is achieved by utilizing design optimization techniques at different levels of abstraction. Particularly, user-specific critical parameters are identified at the algorithmic level and are explicitly used along with multiplier-less implementations at the architecture level. The system has been tested on neural data obtained from in-vivo animal recordings and has been implemented in 90nm bulk-Si technology. The results show up to 90 % savings in power as compared to prevalent wavelet based seizure detection technique while achieving 97% average detection rate.