Digital signal processing (3rd ed.): principles, algorithms, and applications
Digital signal processing (3rd ed.): principles, algorithms, and applications
Local Search Method for FIR Filter Coefficients Synthesis
DELTA '04 Proceedings of the Second IEEE International Workshop on Electronic Design, Test and Applications
High-performance CMOS variability in the 65-nm regime and beyond
IBM Journal of Research and Development - Advanced silicon technology
Algebraic Methods for Optimizing Constant Multiplications in Linear Systems
Journal of VLSI Signal Processing Systems
Low-power DWT-based quasi-averaging algorithm and architecture for epileptic seizure detection
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Fast and energy-efficient constant-coefficient FIR filters using residue number system
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
Error-resilient low-power DSP via path-delay shaping
Proceedings of the 48th Design Automation Conference
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In this paper, we present a novel finite-impulse response (FIR) filter synthesis technique that allows for aggressive voltage scaling by exploiting the fact that all filter coefficients are not equally important to obtain a "reasonably accurate" filter response. Our technique implements a level-constrained common-subexpression-elimination algorithm, where we can constrain the number of adder levels (ALs) required to compute each of the coefficient outputs. By specifying a tighter constraint (in terms of the number of adders in the critical path) on the important coefficients, we ensure that the later computational steps compute only the less important coefficient outputs. In case of delay variations due to voltage scaling and/or process variations, only the less important outputs are affected, resulting in graceful degradation of filter quality. The proposed architecture, therefore, lends itself to aggressive voltage scaling for low-power dissipation even under process parameter variations. Under extreme process variation and supply voltage scaling (0.8 V), filters implemented in the Predictive Technology Model (PTM) 70 nm technology show an average power savings of 25%-30% with minor degradation in filter response in terms of normalized passband/stopband ripple (0.02 at a scaled voltage of 0.8 V compared with 0.005 at a nominal supply).