Dynamic workload characterization for power efficient scheduling on CMP systems

Authors:
Gaurav Dhiman;Vasileios Kontorinis;Dean Tullsen;Tajana Rosing;Eric Saxe;Jonathan Chew
Affiliations:
UC San Diego, La Jolla, CA., USA;UC San Diego, La Jolla, CA., USA;UC San Diego, La Jolla, CA., USA;UC San Diego, La Jolla, CA., USA;Oracle Corp, Menlo Park, CA., USA;Oracle Corp, Menlo Park, CA., USA
Venue:
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Year:
2010

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Abstract

Runtime characteristics of individual threads (such as IPC, cache usage, etc.) are a critical factor in making efficient scheduling decisions in modern chip-multiprocessor systems. They provide key insights into how threads interact when they share processor resources, and affect the overall system power and performance efficiency. In this paper, we propose and implement mechanisms and policies for a commercial OS scheduler and load balancer which incorporates thread characteristics, and show that it results in improvements of up to 30% in performance per watt.