Fast motion estimation using configurable and extendible processing cores

Authors:
Trevor Spiteri;George Vafiadis;Mohammed Faies;Jose Luis Nunez-Yanez
Affiliations:
Department of Electrical and Electronic Engineering, University of Bristol, UK;Department of Electrical and Electronic Engineering, University of Bristol, UK;Department of Electrical and Electronic Engineering, University of Bristol, UK;Department of Electrical and Electronic Engineering, University of Bristol, UK
Venue:
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
Year:
2009

Citing 4
Cited 0

A novel hexagonal search algorithm for fast block matching motion estimation

EURASIP Journal on Applied Signal Processing
Adaptive motion estimation processor for autonomous video devices

EURASIP Journal on Embedded Systems
Performance and complexity co-evaluation of the advanced video coding standard for cost-effective multimedia communications

EURASIP Journal on Applied Signal Processing
A comparison of block-matching algorithms mapped to systolic-array implementation

IEEE Transactions on Circuits and Systems for Video Technology

Quantified Score

Hi-index	0.00

Visualization

Abstract

This paper presents a reconfigurable processor and an associated toolset able to generate high-performance and fast motion estimation cores for high-definition video coding applications. The presented tools include a compiler, a cycle-accurate model and a design space exploration framework. With the help of these tools the designer can generate a processor architecture and algorithm pair matched to a particular level of video coding quality and performance. Motion estimation is the most complex part of video codec standards and has a very large impact on the bit rate and quality of the coding algorithm. Current hardware is largely based on full-search approaches which have a low level of efficiency, especially for the large search ranges needed in high definition.