Analysis of extensive power factor by FPGA under power quality disturbance

Authors:
Shu-Chen Wang;Chi-Jui Wu
Affiliations:
Department of Computer and Communication Engineering, Taipei College of Maritime Technology, Taipei, Taiwan;Dep. of Electrical Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan
Venue:
IMCAS'10 Proceedings of the 9th WSEAS international conference on Instrumentation, measurement, circuits and systems
Year:
2010

Citing 2
Cited 2

Power modeling and characteristics of field programmable gate arrays

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Active leakage power optimization for FPGAs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Design of accurate power factor measurement approach using FPGA-based chip

WSEAS Transactions on Circuits and Systems
Hierarchical clustering in power system based on fuzzy transitive closure

WSEAS Transactions on Circuits and Systems

Quantified Score

Hi-index	0.00

Visualization

Abstract

This paper used six formulas for power factor measurement, and they will be different according to the characteristics of load. The power quality is more and more serious, because a lot of information technology equipments and power electric converters were used in recent years. Harmonic and load unbalance can affect the measurement result of power factor of utility. The Fast Fourier Transform (FFT) is used to analyze the six formula of power factor. The simulation system was modeled in Hardware Description Language (VHDL) and some novel IP (intellectual property) cores, such as CORDIC core and FFT core by the way of Bottom-Up. The technology of semiconductor was more and more maturely. Design of SOC (System On a Chip) is a trend to achieve the strong and small volume in the future. The measurement data were employed to calculate active, reactive and apparent power. The average error rate of our design is about 0.05%.