Measurement of voltage flicker and implementation using FPGA
IMACS'08 Proceedings of the 7th WSEAS International Conference on Instrumentation, Measurement, Circuits and Systems
IMCAS'09 Proceedings of the 8th WSEAS international conference on Instrumentation, measurement, circuits and systems
IMCAS'09 Proceedings of the 8th WSEAS international conference on Instrumentation, measurement, circuits and systems
WSEAS Transactions on Circuits and Systems
Using fuzzy modeling to describe power system QV curve
IMCAS'10 Proceedings of the 9th WSEAS international conference on Instrumentation, measurement, circuits and systems
Analysis of extensive power factor by FPGA under power quality disturbance
IMCAS'10 Proceedings of the 9th WSEAS international conference on Instrumentation, measurement, circuits and systems
Power quality assessment of specially connected transformers
IMCAS'10 Proceedings of the 9th WSEAS international conference on Instrumentation, measurement, circuits and systems
Power modeling and characteristics of field programmable gate arrays
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Active leakage power optimization for FPGAs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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In recent years, power electronic components introduce harmonic pollution on electric power systems. It makes the traditional electromechanical power meter can not act accurately when it feeds unbalanced and harmonic loads. Power quality analysis now tends to use digital signal technology. But it is hard to avoid measurement errors in estimating power quality by digital signal technology. In this paper, it is to improve the computation errors by using FPGA. The simulation circuits were created and measured by Matlab. Then it will discuss the case of single-phase full-wave bridge rectifier loads. And then in the three-phase circuit the effective power factor, arithmetic power factor, and fundamental power factor will be compared in several simulation cases. The computation errors have been greatly reduced. In the study, the Fast Fourier Transform (FFT) is used to analyze the formula of power factor. The simulation system was modeled in Hardware Description Language (VHDL) and some novel IP (intellectual property) cores, such as CORDIC core and FFT core by the way of Bottom-Up. Design of SOC (System on a Chip) is a trend to achieve the strong and small volume in the future.