Bus-invert coding for low-power I/O
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Design Method of a Class of Embedded Combinational Self-Testing Checkers for Two-Rail Codes
IEEE Transactions on Computers - Special issue on fault-tolerant embedded systems
Design of Totally Self-Checking Check Circuits for m-Out-of-n Codes
IEEE Transactions on Computers
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We first show that the error rate estimations presented in the above paper are incorrect. Then, we clarify some issues regarding the totally self-checking properties of the proposed circuitry and show that the power consumption of the encoded bus actually increases. Some minor inaccuracies are also pointed out.