Design of self-checking digital networks using coding techniques
Design of self-checking digital networks using coding techniques
Optimum test patterns for parity networks
AFIPS '70 (Fall) Proceedings of the November 17-19, 1970, fall joint computer conference
Burst Unidirectional Error-Detecting Codes
IEEE Transactions on Computers - The MIT Press scientific computation series
A note on strongly fault-secure sequential circuits
IEEE Transactions on Computers
Design of Fast Self-Testing Checkers for a Class of Berger Codes
IEEE Transactions on Computers
IEEE Transactions on Computers
On error indication for totally self-checking systems
IEEE Transactions on Computers
Design of Totally Self-Checking Code-Disjoint Synchronous Sequential Circuits
EDCC-3 Proceedings of the Third European Dependable Computing Conference on Dependable Computing
On-line detection of logic errors due to crosstalk, delay, and transient faults
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Embedded self-testing checkers for low-cost arithmetic codes
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Generalized modular design of testable m-out-of-n code checker
ATS '95 Proceedings of the 4th Asian Test Symposium
DFT '95 Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
Self-checking and fail-safe LSIs by intra-chip redundancy
FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
A Design Technique of TSC Checker for Borden's Code
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Highly testable and compact single output comparator
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Programmable Embedded Self-Testing Checkers for All-Unidirectional Error-Detecting Codes
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
On-Line Testing Scheme for Clock's Faults
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Towards Totally Self-Checking Delay-Insensitive Systems
FTCS '95 Proceedings of the Twenty-Fifth International Symposium on Fault-Tolerant Computing
On the Design of Self-Checking Controllers with Datapath Interactions
IEEE Transactions on Computers
Design of Totally Self-Checking Checker for 1-out-of-3 Code
IEEE Transactions on Computers
A New Design Method for m-Out-of-n TSC Checkers
IEEE Transactions on Computers
Fault-Tolerant Computing: An Introduction and a Viewpoint
IEEE Transactions on Computers
Design of a Self-Checking Microprogram Control
IEEE Transactions on Computers
IEEE Transactions on Computers
Concurrent Error Detection in Multiply and Divide Arrays
IEEE Transactions on Computers
IEEE Transactions on Computers
Fast and Efficient Totally Self-Checking Checkers for m-out-of-(2m ± 1) Codes
IEEE Transactions on Computers
Asynchronous State Assignments with Unateness Properties and Fault-Secure Design
IEEE Transactions on Computers
Efficient Design of Self-Checking Checker for any m-Out-of-n Code
IEEE Transactions on Computers
A Rollback Interval for Networks with an Imperfect Self-Checking Property
IEEE Transactions on Computers
A Totally Self-Checking 1-Out-of-3 Checker
IEEE Transactions on Computers
A Design for Testability of Undetectable Crosspoint Faults in Programmable Logic Arrays
IEEE Transactions on Computers
Design of Totally Self-Checking Comparators with an Arbitrary Number of Inputs
IEEE Transactions on Computers
A Self-Testing Group-Parity Prediction Checker and Its Use for Built-In Testing
IEEE Transactions on Computers
PLA Implementation of k-out-of-n Code TSC Checker
IEEE Transactions on Computers
Design and Application of Self-Testing Comparators Implemented with MOS PLA's
IEEE Transactions on Computers
Design of Self-Checking MOS-LSI Circuits: Application to a Four-Bit Microprocessor
IEEE Transactions on Computers
Multivalued I2L Circuits for TSC Checkers
IEEE Transactions on Computers
A Theory of Diagnosability of Digital Systems
IEEE Transactions on Computers
Comments on "Asynchronous Sequential Machines Designed for Fault Detection"
IEEE Transactions on Computers
Totally Self-Checking Checker for 1-out-of-n Code Using Two-Rail Codes
IEEE Transactions on Computers
On Totally Self-Checking Checkers for Separable Codes
IEEE Transactions on Computers
An Algebraic Model of Fault-Masking Logic Circuits
IEEE Transactions on Computers
A Theory of Totally Self-Checking System Design
IEEE Transactions on Computers
Self-Testing Embedded Borden t-UED Code Checkers for t=2kq-1 with q=2m-1
Journal of Electronic Testing: Theory and Applications
A study of intermittent faults in digital computers
AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
Design of parallel fault-secure encoders for systematic cyclic block transmission codes
Microelectronics Journal
Online multiple error detection in crossbar nano-architectures
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
Comments on "A low-power dependable berger code for fully asymmetric communication"
IEEE Communications Letters
An error-correcting unordered code and hardware support for robust asynchronous global communication
Proceedings of the Conference on Design, Automation and Test in Europe
IEEE Transactions on Computers
Online detection of multiple faults in crossbar nano-architectures using dual rail implementations
NANOARCH '09 Proceedings of the 2009 IEEE/ACM International Symposium on Nanoscale Architectures
On CMOS totally self-checking circuits
ITC'84 Proceedings of the 1984 international test conference on The three faces of test: design, characterization, production
State encoding and minimization methodology for self-checking sequential machines
EUROCAST'11 Proceedings of the 13th international conference on Computer Aided Systems Theory - Volume Part I
Journal of Electronic Testing: Theory and Applications
| Hi-index | 15.07 |
The design of totally self-checking check circuits for m-out-of-n codes is described. Totally self-checking m-out-of-n checkers provide an error indication whenever the input is not an m-out-of-n code or whenever a fault occurs within the checker itself. Since the checker checks itself, there is no need for additional maintenance access or periodic exercise of the checker to verify its ability to detect errors. The basic structure of the checker relies on the use of majority detection circuits. Various gate level implementations for the majority detection circuits are also presented, although the self-checking capability of the checker does not depend on their particular implementation since they are exhaustively tested by code inputs. The self-testing checkers for k-out-of-2k codes are discussed in the most detail since the totally self-checking checkers for 1-out-of-n and arbitrary m-out-of-n codes are constructed by first translating the code to a k-out-of-2k code via a totally self-checking translator.