Switching and Finite Automata Theory: Computer Science Series
Switching and Finite Automata Theory: Computer Science Series
Introduction to Logic and Switching Theory
Introduction to Logic and Switching Theory
DAC '78 Proceedings of the 15th Design Automation Conference
Multiple Fault Detection in Combinational Networks
IEEE Transactions on Computers
Design of Totally Self-Checking Check Circuits for m-Out-of-n Codes
IEEE Transactions on Computers
Multiple Fault Detection in Programmable Logic Arrays
IEEE Transactions on Computers
Minimal Redundant Logic for High Reliability and Irredundant Testability
IEEE Transactions on Computers
Detection of Faults in Programmable Logic Arrays
IEEE Transactions on Computers
On the Design of Logic Networks with Redundancy and Testability Considerations
IEEE Transactions on Computers
An introduction to array logic
IBM Journal of Research and Development
Lower Overhead Design for Testability of Programmable Logic Arrays
IEEE Transactions on Computers - The MIT Press scientific computation series
A New Approach to the Design of Testable PLA's
IEEE Transactions on Computers
The Influence of Masking Phenomenon on Coverage Capability of Single Fault Test Sets in PLA's
IEEE Transactions on Computers
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In this paper, the validity of single fault assumption in deriving diagnostic test sets is examined with respect to crosspoint faults in programmable logic arrays (PLA's). The control input procedure developed here can be used to convert PLA's having undetectable crosspoint faults to crosspoint-irredundant PLA's for testing purposes. All crosspoints will be testable in crosspoint-irredundant PLA's. The control inputs are used as extra variables during testing. They are maintained at logic 1 during normal operation. A useful heuristic for obtaining a near-minimal number of control inputs is suggested. Expressions for calculating bounds on the number of control inputs have also been obtained.