Error Coding for Arithmetic Processors
Error Coding for Arithmetic Processors
Self-testing residue trees
Detection of Unidirectional Multiple Errors Using Low-Cost Arithmetic Codes
IEEE Transactions on Computers
Design of a Self-Checking Microprogram Control
IEEE Transactions on Computers
Design of Totally Self-Checking Check Circuits for m-Out-of-n Codes
IEEE Transactions on Computers
Lookaside Techniques for Minimum Circuit Memory Translators
IEEE Transactions on Computers
The Design of a Microprogrammed Self-Checking Processor of an Electronic Switching System
IEEE Transactions on Computers
Partially Self-Checking Circuits and Their Use in Performing Logical Operations
IEEE Transactions on Computers
Note on Self-Checking Checkers
IEEE Transactions on Computers
A Simple Self-Testing Decoder Checking Circuit
IEEE Transactions on Computers
Arithmetic Error Codes: Cost and Effectiveness Studies for Application in Digital System Design
IEEE Transactions on Computers
IBM Journal of Research and Development
Burst Unidirectional Error-Detecting Codes
IEEE Transactions on Computers - The MIT Press scientific computation series
Design of Fast Self-Testing Checkers for a Class of Berger Codes
IEEE Transactions on Computers
A New Design Method for Self-Checking Unidirectional Combinational Circuits
Journal of Electronic Testing: Theory and Applications - Special issue on On-line testing
Embedded self-testing checkers for low-cost arithmetic codes
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A linear code-preserving signature analyzer COPMISR
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Programmable Embedded Self-Testing Checkers for All-Unidirectional Error-Detecting Codes
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
New Self-Checking Circuits by Use of Berger-Codes
IOLTW '00 Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW)
A New Method for Concurrent Checking by Use of a 1-out-of-4 Code
IOLTW '00 Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW)
Towards Totally Self-Checking Delay-Insensitive Systems
FTCS '95 Proceedings of the Twenty-Fifth International Symposium on Fault-Tolerant Computing
Asynchronous State Assignments with Unateness Properties and Fault-Secure Design
IEEE Transactions on Computers
Modified Berger Codes for Detection of Unidirectional Errors
IEEE Transactions on Computers
Multivalued I2L Circuits for TSC Checkers
IEEE Transactions on Computers
A Theory of Totally Self-Checking System Design
IEEE Transactions on Computers
IEEE Transactions on Computers
RSYN: a system for automated synthesis of reliable multilevel circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Design of totally self-checking (TSC) checkers for separable codes is studied. Assuming a specific checker design, a sufficient condition on separable codes is derived such that the assumed checker is TSC. It is shown that the proposed checker is applicable to certain Berger codes and residue codes. A class of codes equivalent to Berger codes is derived for which the proposed checker is TSC.