A New Method for Concurrent Checking by Use of a 1-out-of-4 Code

Authors:
M. Gössel;A. Dmitiriev;Vl. Saposhnikov;V. Saposhnikov
Affiliations:
-;-;-;-
Venue:
IOLTW '00 Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW)
Year:
2000

Citing 3
Cited 1

Testing the monster chip

IEEE Spectrum
Design for soft-error robustness to rescue deep submicron scaling

ITC '98 Proceedings of the 1998 IEEE International Test Conference
On Totally Self-Checking Checkers for Separable Codes

IEEE Transactions on Computers

A Formal Approach to On-Line Monitoring of Digital VLSI Circuits: Theory, Design and Implementation

Journal of Electronic Testing: Theory and Applications

Quantified Score

Hi-index	0.00

Visualization

Abstract

In this paper, a new method for concurrent checking is proposed. For an arbitrarily given combinational circuit f an additional complementary circuit g is determined such that for every input the componentwise modulo 2 sum of the corresponding outputs of f and g is an element of a considered code as long as no error occurs. The new method of concurrent checking is developed for the concrete case of 1-out-of-4 codes.