Design of Integrated Circuits for Optical Communications
Design of Integrated Circuits for Optical Communications
Bandwidth enhancement with low group-delay variation for a 40-Gb/s transimpedance amplifier
IEEE Transactions on Circuits and Systems Part I: Regular Papers
A 10-Gb/s inductorless transimpedance amplifier
IEEE Transactions on Circuits and Systems II: Express Briefs
On the use of multi-path inductorless TIAs for larger transimpedance limit
Analog Integrated Circuits and Signal Processing
On the use of multi-path inductorless TIAs for larger transimpedance limit
Analog Integrated Circuits and Signal Processing
Analog Integrated Circuits and Signal Processing
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The transimpedance limit describes the maximum transimpedance that a transimpedance amplifier (TIA) can attain for a given bandwidth and technology. We analyze and compare this limit for a wide variety of TIA topologies thus exposing their relative merits. The topologies considered are the shunt-feedback TIA with single and multistage amplifier, the shunt-feedback TIA with feedback capacitor, the shunt-feedback TIA followed by a post amplifier, the shunt-feedback TIA with a current amplifier, the common-base/gate feedforward TIA, the shunt-feedback TIA with a common-base/gate input stage, and the shunt-feedback TIA with a regulated-cascode input stage. The analysis includes a discussion of the conditions under which the limit is realizable.