High performance memory-based translation on IXM2 massively parallel associative memory processor

  • Authors:
  • Hiroaki Kitano;Tetsuya Higuchi

  • Affiliations:
  • Center for Machine Translation, Carnegie Mellon University, Pittsburgh, PA and NEC Corporation, Tokyo, Japan;Electrotechnical Laboratory, Tsukuba, Ibaraki, Japan

  • Venue:
  • AAAI'91 Proceedings of the ninth National conference on Artificial intelligence - Volume 1
  • Year:
  • 1991

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Abstract

This paper reports experimental results of a high performance (real-time) memory-based translation. Memory-based translation is a new approach to machine translation which uses examples, or cases, of past translations to carry out translation of sentences. This idea is counter to traditional machine translation systems which rely on extensive use of rules in parsing, transfer and generation. Although, there are some preliminary reports on the superiority of the memory-based translation in terms of its scalability, quality of translation, and easiness of grammar writing, we have not seen any reports on its performance. This is perhaps, the first report discussing the feasibility and problems of the approach based on actual massively parallel implementation using real data. We also claim that the architecture of the IXM2 associative processor is highly suitable for memory-based translation tasks. Parsing performance of the memory-based translation system attained a few milliseconds per sentence.