Fault sensitivity analysis

Authors:
Yang Li;Kazuo Sakiyama;Shigeto Gomisawa;Toshinori Fukunaga;Junko Takahashi;Kazuo Ohta
Affiliations:
Department of Informatics, The University of Electro-Communications, Chofu, Tokyo, Japan;Department of Informatics, The University of Electro-Communications, Chofu, Tokyo, Japan;Department of Informatics, The University of Electro-Communications, Chofu, Tokyo, Japan;NTT Information Sharing Platform Laboratories, NTT Corporation, Musashino-shi, Tokyo, Japan;Department of Informatics, The University of Electro-Communications, Chofu, Tokyo, Japan and NTT Information Sharing Platform Laboratories, NTT Corporation, Musashino-shi, Tokyo, Japan;Department of Informatics, The University of Electro-Communications, Chofu, Tokyo, Japan
Venue:
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
Year:
2010

Citing 8
Cited 5

Differential Fault Analysis of Secret Key Cryptosystems

CRYPTO '97 Proceedings of the 17th Annual International Cryptology Conference on Advances in Cryptology
An Optimized S-Box Circuit Architecture for Low Power AES Design

CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation

Proceedings of the conference on Design, automation and test in Europe - Volume 1
Masking Does Not Protect Against Differential Fault Attacks

FDTC '08 Proceedings of the 2008 5th Workshop on Fault Diagnosis and Tolerance in Cryptography
Fault Analysis Attack against an AES Prototype Chip Using RSL

CT-RSA '09 Proceedings of the The Cryptographers' Track at the RSA Conference 2009 on Topics in Cryptology
An Improved Fault Based Attack of the Advanced Encryption Standard

AFRICACRYPT '09 Proceedings of the 2nd International Conference on Cryptology in Africa: Progress in Cryptology
WDDL is Protected against Setup Time Violation Attacks

FDTC '09 Proceedings of the 2009 Workshop on Fault Diagnosis and Tolerance in Cryptography
A generalized method of differential fault attack against AES cryptosystem

CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems

On the power of fault sensitivity analysis and collision side-channel attacks in a combined setting

CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
Differential fault analysis of full LBlock

COSADE'12 Proceedings of the Third international conference on Constructive Side-Channel Analysis and Secure Design
Fault analysis study of the block cipher FOX64

Multimedia Tools and Applications
Exploring the relations between fault sensitivity and power consumption

COSADE'13 Proceedings of the 4th international conference on Constructive Side-Channel Analysis and Secure Design
On measurable side-channel leaks inside ASIC design primitives

CHES'13 Proceedings of the 15th international conference on Cryptographic Hardware and Embedded Systems

Quantified Score

Hi-index	0.00

Visualization

Abstract

This paper proposes a new fault-based attack called the Fault Sensitivity Analysis (FSA) attack, which unlike most existing fault-based analyses including Differential Fault Analysis (DFA) does not use values of faulty ciphertexts. Fault sensitivity means the critical condition when a faulty output begins to exhibit some detectable characteristics, e.g., the clock frequency when fault operation begins to occur. We explain that the fault sensitivity exhibits sensitive-data dependency and can be used to retrieve the secret key. This paper presents two practical FSA attacks against two AES hardware implementations on SASEBO-R, PPRM1-AES and WDDL-AES. Different from previous work, we show that WDDL-AES is not perfectly secure against setup-time violation attacks. We also discuss a masking technique as a potential countermeasure against the proposed fault-based attack.