MPSoC architecture-aware automatic NoC topology design

Authors:
Rachid Dafali;Jean-Philippe Diguet
Affiliations:
European University of Brittany, UBS, CNRS, Lab-STICC dept., Lorient Cedex, France;European University of Brittany, UBS, CNRS, Lab-STICC dept., Lorient Cedex, France
Venue:
NPC'10 Proceedings of the 2010 IFIP international conference on Network and parallel computing
Year:
2010

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Abstract

This paper presents a methodology for the automatic definition of NoC topology according to application and architecture requirements. The proposed solution, which has been implemented as a new step of our NoC design flow, results from the analysis of real concerns and demands from designers. The main contribution lies in the fact that we customize the method according to multiprocessor architecture models and associated memory organizations. A real-life H264 example has been used to compare synthesis results for NoCs generated by our tool, with automatic topology selection with well-known efficient topologies, which wer manually specified. Results clearly show the efficiency of our approach.