Proceedings of the 39th annual Design Automation Conference
A fractional-N frequency synthesizer for single-chip UHF RFID reader
Analog Integrated Circuits and Signal Processing
Hardware simplification to the delta path in a MASH 111 delta-sigma modulator
IEEE Transactions on Circuits and Systems II: Express Briefs
Hardware reduction in digital delta-sigma modulators via error masking: part I: MASH DDSM
IEEE Transactions on Circuits and Systems Part I: Regular Papers
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For multistage noise-shaping (MASH) delta-sigma modulation, this paper presents a new structure that is free of spurs for all input values. The proposed MASH structure cascades several first-order delta-sigma modulators (DSMs) like the traditional MASH structure but has an additional feedforward connection between two adjacent stages. The proposed MASH structure can increase the sequence length and thus reduce spurs. The reason why the proposed MASH structure has a long sequence length for the full input range is mathematically proved, and simulations are performed to verify the effect of the long sequence length. Simulation results show that the performance of the proposed MASH structure is close to that of the ideal DSM. In addition, the proposed MASH structure requires almost the same hardware cost as the traditional MASH structure.