Exponentiation cryptosystems on the IBM PC
IBM Systems Journal
Fast Multiplication on Elliptic Curves over GF(2m) without Precomputation
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
A High Performance Reconfigurable Elliptic Curve Processor for GF(2m)
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
Guide to Elliptic Curve Cryptography
Guide to Elliptic Curve Cryptography
An area-efficient universal cryptography processor for smart cards
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Design of flexible GF(2m) elliptic curve cryptography processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Embedded Software Design of Scalable Low-Area Elliptic-Curve Cryptography
IEEE Embedded Systems Letters
A microcoded elliptic curve processor using FPGA technology
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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The work in this paper discusses the feasibility of a low-resource ECC processor implementation over GF(2m) that supports scalability across a set of standards curves for application in resource constrained environments. A new architecture based on the microcoding technique and targeted to FPGAs is presented for the implementation of a low resource ECC processor design that is scalable to support the 131, 163, 283, 571 bits suite of recommended curves without significant deterioration of the performance. The processor is parameterized for 8, 16, 32-bit data-paths, to quantify the gain in terms of time and area in each case. The implementation results obtained show that the microcode approach results in a lesser area overhead for the ECC point multiplication compared to a full hardware implementation; this makes such approach attractive for numerous applications, where the hardware resources are scarce, as in security in wireless sensor nodes, mobile handsets, and smart cards.