An area-efficient universal cryptography processor for smart cards

Authors:
Yadollah Eslami;Ali Sheikholeslami;P. Glenn Gulak;Shoichi Masui;Kenji Mukaida
Affiliations:
Department of DRAM Research and Development, Micron Technology Inc., Boise, ID;Department of Electrical and Computer Engineering, University of Toronto, Toronto, Canada;Department of Electrical and Computer Engineering, University of Toronto, Toronto, Canada;Fujitsu Laboratories Ltd., Kawasaki, Japan;Fujitsu Laboratories Ltd., Kawasaki, Japan
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2006

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Abstract

Cryptography circuits for smart cards and portable electronic devices provide user authentication and secure data communication. These circuits should, in general, occupy small chip area, consume low power, handle several cryptography algorithms, and provide acceptable performance. This paper presents, for the first time, a hardware implementation of three standard cryptography algorithms on a universal architecture. The microcoded cryptography processor targets smart card applications and implements both private key and public key algorithms and meets the power and performance specifications and is as small as 2.25 mm2 in 0.18-µm 6LM CMOS. A new algorithm is implemented by changing the contents of the memory blocks that are implemented in ferroelectric RAM (FeRAM). Using FeRAM allows nonvolatile storage of the configuration bits, which are changed only when a new algorithm instantiation is required.